Power Analysis Attacks on AES

Advanced Encryption Standard is most widely used encryption algorithm in a symmetrical key cryptography. AES was standardized in 2001 after 3 year analysis for vulnerabilities. However the many cryptographic researchers found vulnerabilities of the implementation of AES algorithm and one of the vulnerabilities reported in literature is power analysis. Power analysis attacks exploit the power consumption of the encryption process with the data being processed. Power analysis attacks can be divided to many categories: 1) Simple power analysis; 2) differential power analysis.

Power consumption for logic 0 and logic 1 are clearly distinguishable in the power trace when simple power analysis can be performed. Some simple power analysis attacks involve analyzing one power trace. But often more than one power trace is used in simple power analysis.  Differential power analysis uses statistical methods to identify the correlation between the power dissipation of the device with the data being processed. Differential power analysis, Correlation power analysis and Mutual information analysis are the example for well famous differential power analysis attacks.

Power consumption of a device is the sum of the power consumption of all logic gates. Total power dissipation of a logic gate is the sum of the static and dynamic power consumption of the logic gate. Logic gates are made from CMOS transistors. Explaining the detail of each logic gate is too extensive and only basics are explained. Static power consumption depends on the leakage current of the logic gate and the dynamic power consumption of the logic gate, depends on the state transition of the logic gate.  The table below shows the power consumption for different state transitions.

Traditional power analysis attacks exploit the dynamic power dissipation of the device. That is by correlating the power consumption with the dynamic power consumption, an adversary has the capability to deduce the secret key. Often static power consumption is neglected when compared with dynamic power analysis. When the transistor width is less than 90mn the static power consumption plays a major role in the total power dissipation. Recently a new exploitation in static power dissipation is announced by researchers, where the static power consumption is taken into account.   Power analysis attacks are presented in both microprocessors as well as in circuits.

In order to thwart power analysis attacks, various countermeasures have been proposed by cryptographic researchers. Masking the data being processed, flatten the current drawn by the device and hide the dynamic power using a compliment identical processing unit to obfuscate the power consumption from the data being processed.